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Disambiguation of "Somasekhar, Dinesh"

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A 4.2GHz 0.3mm2 256kb Dual-Vcc SRAM Building Block in 65nm CMOS.

, , , , , , , , , , , , and . ISSCC, page 2572-2581. IEEE, (2006)

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Dinesh Lathia

Dinesh Adhikary

Dinesh Thilakarathna

Dinesh Subramaniam

Dinesh Chandra Bhardwaj

 

Other publications of authors with the same name

Leakage control with efficient use of transistor stacks in single threshold CMOS., , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (1): 1-5 (2002)System-Level Power Analysis of a Multicore Multipower Domain Processor With ON-Chip Voltage Regulators., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (12): 3468-3476 (2016)LVDCSL: low voltage differential current switch logic, a robust low power DCSL family., and . ISLPED, page 18-23. ACM, (1997)Leakage Control with Efficient Use of Transistor Stacks in Single Threshold CMOS., , and . DAC, page 442-445. ACM Press, (1999)A 32 nm Embedded, Fully-Digital, Phase-Locked Low Dropout Regulator for Fine Grained Power Management in Digital Circuits., , , and . IEEE J. Solid State Circuits, 49 (11): 2684-2693 (2014)2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 44 (1): 174-185 (2009)5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 37 (11): 1421-1432 (2002)Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 44 (4): 1199-1208 (2009)A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications., , , , , , and . ESSCIRC, page 355-358. IEEE, (2005)Guest Editorial Emerging Memories - Technology, Architecture and Applications (First Issue)., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (2): 105-108 (2016)