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Disambiguation of "Chen, Zhanping"

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Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits.

, , , , and . DAC, page 489-494. ACM Press, (1998)

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Zhanping Xu

Zhanping Cheng

Zhanping Xu

Chen Chen

Chen Chen

 

Other publications of authors with the same name

A 0.9-μm2 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming., , , , , and . IEEE J. Solid State Circuits, 52 (4): 933-939 (2017)IDDQ Testing for Deep Submicron ICs: Challenges and Solutions., , , and . LATW, page 186-192. IEEE, (2002)Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits., , , , and . DAC, page 489-494. ACM Press, (1998)SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction., , , , , , , , and . IEEE J. Solid State Circuits, 40 (4): 895-901 (2005)A 4 kb Metal-Fuse OTP-ROM Macro Featuring a 2 V Programmable 1.37 μ m 2 1T1R Bit Cell in 32 nm High-k Metal-Gate CMOS., , , , , and . IEEE J. Solid State Circuits, 45 (4): 863-868 (2010)Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process., , , , , and . VLSIC, page 174-. IEEE, (2015)Vertically integrated SOI circuits for low-power and high-performance applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (3): 351-362 (2002)Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications., , , , and . DAC, page 430-435. ACM Press, (1999)Multiple-Vdd multiple-Vth CMOS (MVCMOS) for low power applications., , and . ISCAS (1), page 366-370. IEEE, (1999)Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks., , , and . ISLPED, page 239-244. ACM, (1998)