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Disambiguation of "D'Angelo, Robert"

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A Computationally Efficient Visual Saliency Algorithm Suitable for an Analog CMOS Implementation.

, , , , , , , , , , , , and . Neural Comput., (2018)

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Uta D'Angelo

Rainer D'Angelo

Gennaro D'Angelo

Pablo D'Angelo

Davide D'Angelo

 

Other publications of authors with the same name

An Analog Visual Saliency Processor using Time-mode Computation., , , , , and . ISCAS, page 1-5. IEEE, (2018)Experimental results on wideband spectrum sensing using random sampling ADC in 90nm CMOS., , , and . ISCAS, page 1970-1973. IEEE, (2013)A Computationally Efficient Visual Saliency Algorithm Suitable for an Analog CMOS Implementation., , , , , , , , , and 3 other author(s). Neural Comput., (2018)Three dimensional graphene scaffold for cardiac tissue engineering and in-situ electrical recording., , , , , and . EMBC, page 4201-4203. IEEE, (2016)Compressed sensing of EEG using a random sampling ADC in 90nm CMOS., , , and . BSN, page 1-5. IEEE, (2013)A Compressed Sensing Analog-to-Information Converter With Edge-Triggered SAR ADC Core., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (5): 1135-1148 (2013)A time-mode translinear principle for implementing analog multiplication., and . ISCAS, page 73-76. IEEE, (2014)A Time-Mode Translinear Principle for Nonlinear Analog Computation., and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (9): 2187-2195 (2015)Process Scalability of Pulse-Based Circuits for Analog Image Convolution., , , , , , , , , and 3 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (9): 2929-2938 (2018)