Author of the publication

An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits.

, , , , and . ICCD, page 352-357. IEEE Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An efficient network on-chip architecture based on isolating local and non-local communications., , , and . DATE, page 350-353. EDA Consortium San Jose, CA, USA / ACM DL, (2013)An efficent dynamic multicast routing protocol for distributing traffic in NOCs., , , , , , and . DATE, page 1064-1069. IEEE, (2009)Pipeline Event-driven No-race Charge recycling Logic (PENCL) for low power application., and . ICECS, page 220-223. IEEE, (2003)Sign bit reduction encoding for low power applications., , and . DAC, page 214-217. ACM, (2005)ByZFAD: a low switching activity architecture for shift-and-add multipliers., , and . SBCCI, page 179-183. ACM, (2006)Simultaneous Reduction of Dynamic and Static Power in Scan Structures, , , , and . CoRR, (2007)BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (2): 302-306 (2009)A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 327-340 (2019)Scan-Based Structure with Reduced Static and Dynamic Power Consumption., , , , and . J. Low Power Electron., 2 (3): 477-487 (2006)WL-VC SRAM: a low leakage memory circuit for deep sub-micron design., , and . ISCAS, IEEE, (2006)