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Design of an output stage for high switching frequency DC-DC converters., , , , and . ISIC, page 488-491. IEEE, (2014)A dynamic-voltage-scaling 1kbyte×8-bit non-imprinting Master-Slave SRAM with high speed erase for low-power operation., , , , and . ISIC, page 320-323. IEEE, (2014)Review: A fully-additive printed electronics process with very-low process variations (Bent and unbent substrates) and PDK., , , and . ISCAS, page 1-4. IEEE, (2017)A class-E RF power amplifier with a novel matching network for high-efficiency dynamic load modulation., , , and . ISCAS, page 1-4. IEEE, (2017)An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability., , , and . ISCAS, page 1835-1838. IEEE, (2012)Single-Event-Transient Resilient Memory for DSP in Space Applications., , , , , and . DSP, page 1-5. IEEE, (2018)A Circuit for Reducing the Reverse Current in DCM DC-DC Converters., , , and . DSP, page 1-4. IEEE, (2018)Side-Channel-Attack Resistant Dual-Rail Asynchronous-Logic AES Accelerator Based on Standard Library Cells., , , , , , , , and . AsianHOST, page 1-7. IEEE, (2019)A novel high-rate hybrid window ADC design for monolithic digitally-controlled DC-DC converters., , and . ISCAS, page 1-4. IEEE, (2017)A Low-Profile High-Efficiency Fast Battery Charger With Unifiable Constant-Current and Constant-Voltage Regulation., , , , , and . IEEE Trans. Circuits Syst., 67-I (11): 4099-4109 (2020)