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A multigrid-like technique for power grid analysis.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (10): 1148-1160 (2002)

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Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (2): 271-284 (2012)A Yield Model for Integrated Circuits and its Application to Statistical Timing Analysis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (3): 574-591 (2007)An extension of probabilistic simulation for reliability analysis of CMOS VLSI circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (11): 1372-1381 (1991)Guest Editorial., and . VLSI Design, (1998)Statistical Estimation of the Switching Activity in Digital Circuits., and . DAC, page 728-733. ACM Press, (1994)Worst-case circuit delay taking into account power supply variations., , and . DAC, page 652-657. ACM, (2004)On the need for statistical timing analysis.. DAC, page 764-765. ACM, (2005)Frequency-domain supply current macro-model., and . ISLPED, page 295-298. ACM, (2001)Energy-per-cycle estimation at RTL., and . ISLPED, page 121-126. ACM, (1999)Fast Vectorless RLC Grid Verification., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (3): 489-502 (2017)