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A VLSI parallel machine for speech recognition., and . ICASSP, page 363-366. IEEE, (1984)Designing specific systolic arrays with the API15C chip., , , and . ASAP, page 505-517. IEEE, (1990)A Fully Integrated Systolic Spelling Co-Processor., and . VLSI, volume A-1 of IFIP Transactions, page 257-266. North-Holland, (1991)Systolic architectures for connected speech recognition., , and . IEEE Trans. Acoust. Speech Signal Process., 34 (4): 765-779 (1986)From Equations to Hardware: Towards Systematic Mapping of Algorithms onto Parallel Architectures., , , , , and . ICPIA, volume 654 of Lecture Notes in Computer Science, page 1-15. Springer, (1992)A Teaching Assistant for Algorithm Construction.. ITiCSE, page 9-14. ACM, (2015)MADMACS: a new VLSI layout macro editor., and . DAC, page 654-658. IEEE Computer Society Press, (1986)I/O and computation overlap on SIMD systolic arrays., , and . VLSI Signal Processing, 9 (3): 153-165 (1995)From Equations to Hardware. Towards the Systematic Mapping of Algorithms onto Parallel Architectures., , , , , , and . IJPRAI, 8 (2): 417-438 (1994)Direct Manipulation versus Text-based Programming: An experiment report., , and . ITiCSE, page 353-359. ACM, (2019)