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A Fully Integrated Dual-Channel On-Coil CMOS Receiver for Array Coils in 1.5-10.5 T MRI.

, , , , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 11 (6): 1245-1255 (2017)

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A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput., , , , , , , , , and 3 other author(s). ISSCC, page 268-269. IEEE, (2010)A Reconfigurable DT ΔΣ Modulator for Multi-Standard 2G/3G/4G Wireless Receivers., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (4): 525-536 (2015)A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 46 (1): 52-63 (2011)Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications., , , , , , , , , and 1 other author(s). ESSCIRC, page 198-201. IEEE, (2008)Fundamental Power Limits of SAR and ΔΣ Analog-to-Digital Converters., , , , and . NORCAS, page 1-4. IEEE, (2015)A 1.9 GS/s 4-bit sub-Nyquist flash ADC for 3.8 GHz compressive spectrum sensing in 28 nm CMOS., , , , , and . MWSCAS, page 101-104. IEEE, (2014)A Reconfigurable 5-to-14 bit SAR ADC for Battery-Powered Medical Instrumentation., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (11): 2685-2694 (2015)