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Disambiguation of "Chien, Shao-Yi"

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Perceptual Quality-Regulable Video Coding System With Region-Based Rate Control Scheme.

, , , and . IEEE Trans. Image Processing, 22 (6): 2247-2258 (2013)

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Chieh Chien

Rey-Djin Chien

Chih-Te Chien

Hung-Ju Chien

Ting-Chou Chien

 

Other publications of authors with the same name

Convolutional Neural Network Accelerator with Vector Quantization., , , and . ISCAS, page 1-5. IEEE, (2019)Hardware-efficient true motion estimator based on Markov Random Field motion vector correction., , and . VLSI-DAT, page 1-4. IEEE, (2012)Architecture Design of Convolutional Neural Networks for Face Detection on an FPGA Platform., , , , and . SiPS, page 88-93. IEEE, (2018)A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/quad HDTV applications., , , , , , , , , and 2 other author(s). ISSCC, page 154-155. IEEE, (2009)Distributed video codec with spatiotemporal side information., , , , and . ISCAS, page 1-4. IEEE, (2017)Efficient Spatial-Temporal Error Concealment Algorithm and Hardware Architecture Design for H.264/AVC., , , and . IEEE Trans. Circuits Syst. Video Techn., 20 (11): 1409-1422 (2010)Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine., , , , , and . IEEE Trans. Circuits Syst. Video Techn., 18 (1): 98-109 (2008)Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach., , , , and . VCIP, volume 5150 of Proceedings of SPIE, page 1521-1530. SPIE, (2003)A hardware accelerator for video segmentation using programmable morphology PE array., , and . ISCAS (4), page 341-344. IEEE, (2002)Enhanced temporal error concealment algorithm with edge-sensitive processing order., , , and . ISCAS, page 3466-3469. IEEE, (2008)