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Topic 08+13: Instruction-Level Parallelism and Computer Architecture.

, , , , , , , и . Euro-Par, том 2150 из Lecture Notes in Computer Science, стр. 385. Springer, (2001)

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Janina Seznec

Ernst-Christian André

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Другие публикации лиц с тем же именем

Optimizing Memory Throughput In a Tightly Coupled Multiprocessor., и . ICPP, стр. 344-346. Pennsylvania State University Press, (1987)Data Synchronized Pipeline Architecture: Pipelining in Multiprocessor Environments., и . J. Parallel Distributed Comput., 3 (4): 508-526 (1986)HAVEGE: A user-level software heuristic for generating empirically strong random numbers., и . ACM Trans. Model. Comput. Simul., 13 (4): 334-346 (2003)Fetch Gating Control through Speculative Instruction Window Weighting., и . Trans. High Perform. Embed. Archit. Compil., (2009)Topic 08+13: Instruction-Level Parallelism and Computer Architecture., , , , , , , и . Euro-Par, том 2150 из Lecture Notes in Computer Science, стр. 385. Springer, (2001)Fetch Gating Control Through Speculative Instruction Window Weighting., и . HiPEAC, том 4367 из Lecture Notes in Computer Science, стр. 120-135. Springer, (2007)Register sharing for equality prediction., , и . MICRO, стр. 4:1-4:12. IEEE Computer Society, (2016)Dictionary sharing: An efficient cache compression scheme for compressed caches., и . MICRO, стр. 1:1-1:12. IEEE Computer Society, (2016)DITVA: Dynamic Inter-Thread Vectorization Architecture., , , и . J. Parallel Distributed Comput., (2018)On the Interactions Between Value Prediction and Compiler Optimizations in the Context of EOLE., , и . ACM Trans. Archit. Code Optim., 14 (2): 18:1-18:24 (2017)