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Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs.

, , , , и . ARC, том 10216 из Lecture Notes in Computer Science, стр. 202-213. (2017)

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Fabio Sternberg

Fabio Galbusera

Fabio Farinon

Fabio Giovannini

Fabio Ruggiero

 

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