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Accelerators & Security: The Socket Approach., , and . IEEE Comput. Archit. Lett., 21 (2): 65-68 (2022)MasterMind: Many-Accelerator SoC Architecture for Real-Time Brain-Computer Interfaces., , , and . ICCD, page 101-108. IEEE, (2021)KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design., , and . FMCAD, page 105-109. IEEE, (2019)HARDROID: Transparent Integration of Crypto Accelerators in Android., , , and . HPEC, page 1-8. IEEE, (2021)CRYLOGGER: Detecting Crypto Misuses Dynamically., , , and . CoRR, (2020)Agile SoC Development with Open ESP., , , , , , , , and . CoRR, (2020)Simplified stimuli generation for scenario and assertion based verification., and . LATW, page 1-6. IEEE, (2014)Broadening the exploration of the accelerator design space in embedded scalable platforms., , , and . HPEC, page 1-7. IEEE, (2017)Stimuli generation through invariant mining for black-box verification., and . VLSI-SoC, page 1-6. IEEE, (2016)COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators., , , and . ACM Trans. Embed. Comput. Syst., 16 (5s): 150:1-150:22 (2017)