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A Model-Based Approach Digital Pre-Distortion Method for Current-Steering Digital-to-Analog Converters.

, , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (11): 4583-4595 (2022)

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A 1.2 V 4.5 mW 10 bit 8 MS/s cyclic-ADC for mobile video and sensor applications., , , , , , , , , and . Elektrotech. Informationstechnik, 126 (11): 396-402 (2009)A Model-Based Approach Digital Pre-Distortion Method for Current-Steering Digital-to-Analog Converters., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (11): 4583-4595 (2022)A digitally corrected ADC using a passive pulse frequency modulator., , , , and . ICECS, page 654-657. IEEE, (2014)A 1.2V 56mW 10 bit 165Ms/s pipeline-ADC for HD-video applications., , , , , , , , , and . ESSCIRC, page 270-273. IEEE, (2008)Inverse Modelling Techniques as Dynamic Digital Pre-Distortion for Broadband Systems for CS-DACs Based on Volterra Series Expansion., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (4): 1506-1519 (April 2024)A low power and low distortion VCO based ADC using a pulse frequency modulator., , , , and . MWSCAS, page 487-490. IEEE, (2014)Five-Stage, Power Efficient, Dual Rail, 100MHz, 10dB Programmable Gain Amplifier with Down-Stepping Functions in 28nm CMOS., , , , , and . ISCAS, page 1-5. IEEE, (2019)A Pulse Frequency Modulation VCO-ADC in 40 nm., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (1): 51-55 (2019)A 40mW pseudo-differential 200MHz analog video pre-processing for HDTV flat-panel displays., , , , and . ICECS, page 611-614. IEEE, (2009)A 0.03mm2, 40nm CMOS 1.5GS/s all-digital complementary PWM-GRO., , , , , and . ICECS, page 116-119. IEEE, (2014)