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Circuit Technique for VLSI Design of a Video Codec., , and . ICC (1), page 250-255. Elsevier, (1984)Von abstrakten Architekturtemplates zur hardwarenahen Architekturexploration., and . GI Jahrestagung (1), volume P-67 of LNI, page 458. GI, (2005)Instruction merging to increase parallelism in VLIW architectures., , , , and . SoC, page 143-146. IEEE, (2009)Single board image processing unit for vehicle guidance., and . VLSI, volume A-42 of IFIP Transactions, page 151-160. North-Holland, (1993)A multi DSP board for real time SAR processing using the HiPAR-DSP 16., , , , , and . IGARSS, page 2750-2752. IEEE, (2002)A multi-core SoC design for advanced image and video compression., , , , , , and . ICASSP (5), page 665-668. IEEE, (2005)Design of a DPCM codec for VLSI realization in CMOS technology.. Proc. IEEE, 73 (4): 592-598 (1985)A compact and flexible multi-DSP system for real-time SAR applications., , , , , , and . IGARSS, page 1657-1659. IEEE, (2003)VLSI architectures for block matching algorithms., and . ICASSP, page 2457-2460. IEEE, (1989)Parallelization Strategies for Fast Factorized Backprojection SAR on Embedded Multi-Core Architectures, , , , and . International Conference on Microwave, Communications, Antennas and Electronic Systems, IEEE, (2017)