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A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology.

, , , , , , , , , , , , , , , , , , , , , , , , и . ISSCC, стр. 360-362. IEEE, (2022)

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David J Lutz

David J Downs

David J Roy

-J David Lin

David J Roy

 

Другие публикации лиц с тем же именем

Power-constrained CMOS scaling limits.. IBM J. Res. Dev., 46 (2-3): 235-344 (2002)Supply and threshold voltage optimization for low power design., , , и . ISLPED, стр. 317-322. ACM, (1997)Design and CAD challenges in 45nm CMOS and beyond., , и . ICCAD, стр. 329-333. ACM, (2006)Electroid-oriented adiabatic switching circuits., и . ISLPD, стр. 197-202. ACM, (1995)CMOS scaling into the 21st century: 0.1 µm and beyond., , , , , , , , и . IBM J. Res. Dev., 39 (1-2): 245-260 (1995)A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation., , , , , , , , , и 14 other автор(ы). DATE, стр. 13-16. IEEE, (2022)Nanoscale CMOS., , , , и . Proc. IEEE, 87 (4): 537-570 (1999)Optimizing CMOS technology for maximum performance., , , и . IBM J. Res. Dev., 50 (4-5): 419-432 (2006)Practical Strategies for Power-Efficient Computing Technologies., , , , , , , и . Proc. IEEE, 98 (2): 215-236 (2010)Device scaling limits of Si MOSFETs and their application dependencies., , , , , и . Proc. IEEE, 89 (3): 259-288 (2001)