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A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.

M. Sheu, C. Tsai, M. Tsai, S. Hsia, S. Morsalin, and J. Lin. Sensors, 21 (19): 6591 (2021)

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Ming-Shye Sheu

Sheu-Sheu Tan

Huey-jen Sheu

Sien-Yi Sheu

Ching-Long Sheu

Other publications of authors with the same name

A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic.J. Lin, Y. Hwang, and M. Sheu. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2755-2757 (2010)Low Power Multiplier Designs Based on Improved Column Bypassing Schemes.Y. Hwang, J. Lin, M. Sheu, and C. Sheu. APCCAS, page 594-597. IEEE, (2006)Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping.Y. Hwang, B. Tsai, Y. Pai, and M. Sheu. IIH-MSP, page 325-328. IEEE, (2014)High Dynamic Range Image Based on Block-Based Edge Strength for Embedded System Design.W. Tsai, C. Lai, M. Sheu, and T. Chen. IIH-MSP, page 329-332. IEEE, (2014)High-performance very large scale integration architecture design for various-ratio image scaling.C. Lin, M. Sheu, H. Chiang, and C. Liaw. J. Electronic Imaging, 17 (4): 043010 (2008)Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n, 2n+1-1, 2n-1).S. Lin, M. Sheu, C. Wang, and Y. Kuo. APCCAS, page 168-171. IEEE, (2008)Hardware Accelerator Design of DCT Algorithm With Unique-Group Cosine Coefficients for Mel-Scale Frequency Cepstral Coefficients.S. Lai, Y. Hung, Y. Zhu, S. Wang, Q. Huang, M. Sheu, and W. Juang. IEEE Access, (2022)FIBS-Unet: Feature Integration and Block Smoothing Network for Single Image Dehazing.M. Sheu, S. Morsalin, S. Wang, Y. Shen, S. Hsia, and C. Chang. IEEE Access, (2022)A Novel Bird Detection and Identification based on DPU processor on PYNQ FPGA.G. Lin, H. Nguyen, C. Sun, P. Kuo, and M. Sheu. ICCE-TW, page 1-2. IEEE, (2021)AIoT-based Audio Recognition System for Smart Home Applications.B. Chen, Y. Jhang, H. Pai, S. Wang, M. Sheu, and T. Chen. ICCE-TW, page 1-2. IEEE, (2021)

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Disambiguation of "Sheu, Ming-Hwa"

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A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.

Please choose a person to relate this publication to

Ming-Shye Sheu

Sheu-Sheu Tan

Huey-jen Sheu

Sien-Yi Sheu

Ching-Long Sheu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sheu, Ming-Hwa"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.

Please choose a person to relate this publication to

Ming-Shye Sheu

Sheu-Sheu Tan

Huey-jen Sheu

Sien-Yi Sheu

Ching-Long Sheu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications.