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Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.

C. Peltekis, D. Filippas, G. Dimitrakopoulos, and C. Nicopoulos. MOCAST, page 1-4. IEEE, (2023)

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Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors.M. Skitsas, C. Nicopoulos, and M. Michael. IOLTS, page 110-115. IEEE, (2015)Switch folding: network-on-chip routers with time-multiplexed output ports.G. Dimitrakopoulos, N. Georgiadis, C. Nicopoulos, and E. Kalligeros. DATE, page 344-349. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A High-Performance and Energy-Efficient Virtually Tagged Stack Cache Architecture for Multi-core Environments.S. Kang, C. Nicopoulos, H. Lee, and J. Kim. HPCC, page 58-67. IEEE, (2011)Variation-aware task allocation and scheduling for MPSoC.F. Wang, C. Nicopoulos, X. Wu, Y. Xie, and N. Vijaykrishnan. ICCAD, page 598-603. IEEE Computer Society, (2007)Fast Estimations of Failure Probability Over Long Time Spans.M. Noltsis, P. Englezakis, E. Maragkoudaki, C. Nicopoulos, D. Rodopoulos, F. Catthoor, Y. Sazeides, D. Zoni, and D. Soudris. NANOARCH, page 1-6. ACM, (2018)2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD).Y. Sazeides, A. Bramnik, R. Gabor, C. Nicopoulos, R. Canal, D. Konstantinou, and G. Dimitrakopoulos. DFT, page 1-4. IEEE, (2020)Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage.Z. Takakis, D. Mangiras, C. Nicopoulos, and G. Dimitrakopoulos. IVSW, page 61-66. IEEE, (2019)ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture.I. Seitanidis, A. Psarras, E. Kalligeros, C. Nicopoulos, and G. Dimitrakopoulos. NOCS, page 135-142. IEEE, (2014)ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers.C. Nicopoulos, D. Park, J. Kim, N. Vijaykrishnan, M. Yousif, and C. Das. MICRO, page 333-346. IEEE Computer Society, (2006)BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers.D. Zoni, A. Canidio, W. Fornaciari, P. Englezakis, C. Nicopoulos, and Y. Sazeides. J. Parallel Distributed Comput., (2017)

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Disambiguation of "Nicopoulos, Chrysostomos"

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Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.

Please choose a person to relate this publication to

Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Nicopoulos, Chrysostomos"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.

Please choose a person to relate this publication to

Chrysostomos Kyprianou

Annette Nicopoulos

Chrysostomos Papaioannou

Chrysostomos Mantzabinos

Chrysostomos Valderanis

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.