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Fault Emulation for Dependability Evaluation of VLSI Systems.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (4): 422-431 (2008)

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Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores., , and . LADC, page 49-56. IEEE Computer Society, (2009)Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study., , , and . SRDS, page 85-90. IEEE Computer Society, (2011)Multi-criteria analysis of measures in benchmarking: Dependability benchmarking as a case study., , , and . J. Syst. Softw., (2016)Codesign methodology for computer vision applications., , , and . Microprocess. Microsystems, 28 (5-6): 303-316 (2004)Speeding-Up Simulation-Based Fault Injection of Complex HDL Models., , , and . LADC, page 51-60. IEEE Computer Society, (2016)Reversing FPGA architectures for speeding up fault injection: does it pay?, , and . EDCC, page 81-88. IEEE, (2022)Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults., , and . EDCC, page 190-197. IEEE Computer Society, (2015)Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study., , , and . EWDC, page 23-28. ACM, (2011)Open Challenges in the Resilience Evaluation of Ad Hoc Networks., , , and . EWDC, volume 7869 of Lecture Notes in Computer Science, page 194-197. Springer, (2013)Fast Emulation of Permanent Faults in VLSI Systems., , , and . FPL, page 1-6. IEEE, (2006)