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A 1.5-GHz 6.144T Correlations/s 64 × 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging.

, , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 52 (5): 1450-1457 (2017)

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A 1.5-GHz 6.144T Correlations/s 64 × 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 52 (5): 1450-1457 (2017)An N-path filter enhanced low phase noise ring VCO., , , and . VLSIC, page 1-2. IEEE, (2014)A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-Shaping SAR ADC., and . IEEE J. Solid State Circuits, 47 (12): 2898-2904 (2012)Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch., and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (7): 1396-1408 (2012)Synchronous Die-to-Die Signaling Using Aeonic Connect., , , and . CICC, page 1-6. IEEE, (2023)ADC trends and impact on SAR ADC architecture and analysis., and . CICC, page 1-8. IEEE, (2015)A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression., , , , , , and . IEEE J. Solid State Circuits, 51 (4): 955-965 (2016)A Fully Self-Contained Logarithmic Closed-Loop Deep Brain Stimulation SoC With Wireless Telemetry and Wireless Power Management., , , , , and . IEEE J. Solid State Circuits, 49 (10): 2213-2227 (2014)A 16-channel noise-shaping machine learning analog-digital interface., , , , and . VLSI Circuits, page 1-2. IEEE, (2016)An integrated 120 volt AC mains voltage interface in standard 130 nm CMOS., , and . ESSCIRC, page 238-241. IEEE, (2010)