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Java and the Power of Multi-Core Processing., и . CISIS, стр. 627-631. IEEE Computer Society, (2008)A priori wire length distribution models with multiterminal nets.. IEEE Trans. Very Large Scale Integr. Syst., 11 (1): 35-43 (2003)A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits., , , и . IEEE Trans. Very Large Scale Integr. Syst., 11 (1): 24-34 (2003)Enabling FPGA routing configuration sharing in dynamic partial reconfiguration., , , , и . Des. Autom. Embed. Syst., 19 (1-2): 189-221 (2015)Automatic detection of epileptic seizures on the intra-cranial electroencephalogram of rats using reservoir computing., , , , , , , и . Artif. Intell. Medicine, 53 (3): 215-223 (2011)Scalable hardware accelerator for comparing DNA and protein sequences., , , , , , и . Infoscale, том 152 из ACM International Conference Proceeding Series, стр. 33. ACM, (2006)MODA-PSO: Towards Fast Hard Block Legalization for Analytical FPGA Placement., , и . FPGA, стр. 184. ACM, (2019)TCONMAP: Technology Mapping for Parameterised FPGA Configurations., , , и . ACM Trans. Design Autom. Electr. Syst., 20 (4): 48:1-48:27 (2015)Logic Gates in the routing network of FPGAs (Abstract Only)., , и . FPGA, стр. 262. ACM, (2015)Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy (abstract only)., , , и . FPGA, стр. 287. ACM, (2010)