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Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs.

, , , , and . ISLPED, page 397-402. IEEE/ACM, (2011)

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Early evaluation techniques for low power binding., , , and . ISLPED, page 160-165. ACM, (2002)Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors., , , , and . ISLPED, page 1-6. IEEE, (2017)Power-efficient, reliable microprocessor architectures: modeling and design methods., , , , , , , , , and 5 other author(s). ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)Energy-Aware Accounting and Billing in Large-Scale Computing Facilities., , , , , , , and . IEEE Micro, 31 (3): 60-71 (2011)Thermomechanical stress-aware management for 3D IC designs., , , and . DATE, page 1255-1258. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Design, CAD and technology challenges for future processors: 3D perspectives., , , , , and . DAC, page 212. ACM, (2011)Trends and techniques for energy efficient architectures., , , , , , , and . VLSI-SoC, page 276-279. IEEE, (2010)Transistor Level Budgeting for Power Optimization., , and . ISQED, page 116-121. IEEE Computer Society, (2004)Variation-aware thermal characterization and management of multi-core architectures., and . ICCD, page 280-285. IEEE Computer Society, (2008)3D stacking of high-performance processors., , , , , , , , , and . HPCA, page 500-511. IEEE Computer Society, (2014)