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Towards Efficient Compact Network Training on Edge-Devices., , , и . ISVLSI, стр. 61-67. IEEE, (2019)A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures., , , , , и . ASP-DAC, стр. 48-53. IEEE, (2015)An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video., , , , , и . Sci. China Inf. Sci., 56 (7): 1-14 (2013)Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints., , , , , и . Sci. China Inf. Sci., 58 (8): 1-14 (2015)MapReduce inspired loop mapping for coarse-grained reconfigurable architecture., , , и . Sci. China Inf. Sci., 57 (12): 1-14 (2014)Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution., , , , и . IEEE Comput. Archit. Lett., 17 (2): 147-150 (2018)Battery aware tasks allocating algorithm for multi-battery operated system., , , и . APCCAS, стр. 875-878. IEEE, (2010)An uneven-dual-core processor based mobile platform for facilitating the collaboration among various embedded electronic devices., , , , и . IEEE Trans. Consumer Electronics, 60 (1): 137-145 (2014)A high efficient baseband transceiver for IEEE 802.15.4 LR-WPAN systems., , , , и . ASICON, стр. 224-227. IEEE, (2011)A reconfigurable multi-processor SoC for media applications., , , , , и . ISCAS, стр. 2011-2014. IEEE, (2010)