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Benchmarks for FPGA-Targeted High-Level-Synthesis.

H. Waidyasooriya, Y. Iimura, and M. Hariyama. CANDAR, page 232-238. IEEE, (2019)

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Karunasiri Muthumala

Other publications of authors with the same name

Hardware-oriented succinct-data-structure based on block-size-constrained compression.H. Waidyasooriya, D. Ono, and M. Hariyama. SoCPaR, page 136-140. IEEE, (2015)Implementation of an FPGA-Oriented Complex Number Computation Library Using Intel OneAPI DPC++.K. Obata, H. Waidyasooriya, and M. Hariyama. MWSCAS, page 1-4. IEEE, (2022)Benchmarks for FPGA-Targeted High-Level-Synthesis.H. Waidyasooriya, Y. Iimura, and M. Hariyama. CANDAR, page 232-238. IEEE, (2019)Data-Transfer-Bottleneck-Less Architecture for FPGA-Based Quantum Annealing Simulation.C. Liu, H. Waidyasooriya, and M. Hariyama. CANDAR, page 164-170. IEEE, (2019)OpenCL-Based FPGA Accelerator for 3D FDTD with Periodic and Absorbing Boundary Conditions.H. Waidyasooriya, T. Endo, M. Hariyama, and Y. Ohtera. Int. J. Reconfigurable Comput., (2017)Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators.Y. Takei, H. Waidyasooriya, M. Hariyama, and M. Kameyama. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2658-2669 (2015)Architecture of an FPGA-Based Heterogeneous System for Code-Search Problems.Y. Hiradate, H. Waidyasooriya, M. Hariyama, and M. Harada. SCFA, volume 10776 of Lecture Notes in Computer Science, page 146-155. Springer, (2018)A Memory-Bandwidth-Efficient Word2vec Accelerator Using OpenCL for FPGA.T. Shoji, H. Waidyasooriya, T. Ono, M. Hariyama, Y. Aoki, Y. Kondoh, and Y. Nakagawa. CANDAR Workshops, page 103-108. IEEE, (2019)Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation.Y. Hiramatsu, H. Waidyasooriya, M. Hariyama, T. Nojiri, K. Uchiyama, and M. Kameyama. IEICE Trans. Electron., 95-C (12): 1872-1882 (2012)FPGA-Based Prototype of a Quantum Annealing Simulator for Sparse Ising Model.H. Waidyasooriya, Y. Ohma, and M. Hariyama. MCSoC, page 195-199. IEEE, (2022)

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Disambiguation of "Waidyasooriya, Hasitha Muthumala"

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Benchmarks for FPGA-Targeted High-Level-Synthesis.

Please choose a person to relate this publication to

Karunasiri Muthumala

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Waidyasooriya, Hasitha Muthumala"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Benchmarks for FPGA-Targeted High-Level-Synthesis.

Please choose a person to relate this publication to

Karunasiri Muthumala

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Benchmarks for FPGA-Targeted High-Level-Synthesis.