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Disambiguation of "Hsu, Tzu-Hsiang"

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A 0.5V Real-Time Computational CMOS Image Sensor with Programmable Kernel for Always-On Feature Extraction.

, , , , , , , , , , and . A-SSCC, page 33-34. IEEE, (2019)

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Hsiang-Hsu Wang

Hsiang-Wen Hsu

Hsiang-Hao Hsu

Hsiang Kuang

Mathäus Tzurmbakis

 

Other publications of authors with the same name

A CMOS Time-of-Flight Depth Image Sensor With In-Pixel Background Light Cancellation and Phase Shifting Readout Technique., , , and . IEEE J. Solid State Circuits, 53 (10): 2898-2905 (2018)A CMOS imaging platform using single photon avalanche diode array in standard technology., and . IEEE SENSORS, page 1-3. IEEE, (2017)A 0.8V Intelligent Vision Sensor with Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification., , , , , , , and . ISSCC, page 1-3. IEEE, (2022)A Current-Mode Differential Sensing CMOS Imager for Optical Linear Encoder., , , and . VLSI-DAT, page 1-2. IEEE, (2019)A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array., , , , , , , , , and 2 other author(s). BioCAS, page 1-4. IEEE, (2018)A 12-Bit SAR ADC with Reference Voltage Ripple Suppression., , , and . ISCAS, page 1-4. IEEE, (2021)A Monolithic Optical Encoder using CMOS Image Sensor with Background Light Cancellation., , , , and . ISCAS, page 1-4. IEEE, (2020)A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel., , , , , , , , and . IEEE J. Solid State Circuits, 56 (8): 2516-2524 (2021)A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors., , , , , , , , , and 7 other author(s). ISSCC, page 494-496. IEEE, (2018)5.9 A 0.8V Multimode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM Pixel., , , , , , , , , and 3 other author(s). ISSCC, page 110-112. IEEE, (2020)