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Rethinking DC-DC converter design constraints for adaptable systems that target the minimum-energy point., , , , and . ISLPED, page 383-388. IEEE, (2013)Adaptive subthreshold timing-error detection 8 bit microcontroller in 65 nm CMOS., , , and . ISCAS, page 2953-2956. IEEE, (2012)A fully integrated self-oscillating switched-capacitor DC-DC converter for near-threshold loads., , , and . A-SSCC, page 1-4. IEEE, (2015)Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery., , , , , , and . VLSIC, page 320-. IEEE, (2015)FDSOI versus BULK CMOS at 28 nm node which technology for ultra-low power design?, and . ISCAS, page 554-557. IEEE, (2013)Measurement of a system-adaptive error-detection sequential circuit with subthreshold SCL., , , and . NORCHIP, page 1-4. IEEE, (2011)Implementing Minimum-Energy-Point Systems With Adaptive Logic., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (4): 1247-1256 (2016)Adaptive Sub-Threshold Test Circuit., , , , and . AHS, page 197-203. IEEE Computer Society, (2009)