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FPGA-Based Acceleration for Bayesian Convolutional Neural Networks., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5343-5356 (2022)Reconfigurable Acceleration of Short Read Mapping with Biological Consideration., , , and . FPGA, page 229-239. ACM, (2021)F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition., , , , , , , and . ASAP, page 1-8. IEEE, (2019)Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator., , , , , , and . CoRR, (2021)Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search., , , , , and . ICCD, page 465-468. IEEE, (2020)Efficient Weight Reuse for Large LSTMs., , , , , , and . ASAP, page 17-24. IEEE, (2019)ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development., , and . FPGA, page 189-198. ACM, (2018)Self-map building in wireless sensor network based on TDOA measurements., , , and . MFI, page 150-155. IEEE, (2012)Optimizing CNN-based Hyperspectral ImageClassification on FPGAs., , , and . CoRR, (2019)Acceleration of MCMC-based algorithms using reconfigurable logic.. Imperial College London, UK, (2017)British Library, EThOS.