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Constructing Concurrent Data Structures on FPGA with Channels.

H. Yan, Z. Li, L. Liu, S. Yin, and S. Wei. FPGA, page 172-177. ACM, (2019)

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Shouyi Zhang

Li Yin

Zhihong Yin

Lu Yin

Other publications of authors with the same name

A reconfigurable multi-processor SoC for media applications.M. Zhu, L. Liu, S. Yin, Y. Wang, W. Wang, and S. Wei. ISCAS, page 2011-2014. IEEE, (2010)Disturbance Aware Memory Partitioning for Parallel Data Access in STT-RAM.S. Yin, Z. Xie, and S. Wei. DAC, page 84:1-84:6. ACM, (2017)Constructing Concurrent Data Structures on FPGA with Channels.H. Yan, Z. Li, L. Liu, S. Yin, and S. Wei. FPGA, page 172-177. ACM, (2019)Reconfigurable Architecture for Neural Approximation in Multimedia Computing.F. Tu, S. Yin, P. Ouyang, L. Liu, and S. Wei. IEEE Trans. Circuits Syst. Video Techn., 29 (3): 892-906 (2019)Efficient memory partitioning for parallel data access in multidimensional arrays.C. Meng, S. Yin, P. Ouyang, L. Liu, and S. Wei. DAC, page 160:1-160:6. ACM, (2015)An efficient VLSI architecture of speeded-up robust feature extraction for high resolution and high frame rate video.W. Zhang, L. Liu, S. Yin, R. Zhou, S. Cai, and S. Wei. Sci. China Inf. Sci., 56 (7): 1-14 (2013)Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints.C. Wu, C. Deng, L. Liu, S. Yin, J. Han, and S. Wei. Sci. China Inf. Sci., 58 (8): 1-14 (2015)MapReduce inspired loop mapping for coarse-grained reconfigurable architecture.S. Yin, S. Shao, L. Liu, and S. Wei. Sci. China Inf. Sci., 57 (12): 1-14 (2014)Breaking the Synchronization Bottleneck with Reconfigurable Transactional Execution.Z. Li, L. Liu, Y. Deng, S. Yin, and S. Wei. IEEE Comput. Archit. Lett., 17 (2): 147-150 (2018)An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS.S. Yin, P. Ouyang, J. Yang, T. Lu, X. Li, L. Liu, and S. Wei. VLSI Circuits, page 37-38. IEEE, (2018)

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Disambiguation of "Yin, Shouyi"

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Constructing Concurrent Data Structures on FPGA with Channels.

Please choose a person to relate this publication to

Shouyi Zhang

Shouyi Zhang

Li Yin

Zhihong Yin

Lu Yin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yin, Shouyi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Constructing Concurrent Data Structures on FPGA with Channels.

Please choose a person to relate this publication to

Shouyi Zhang

Shouyi Zhang

Li Yin

Zhihong Yin

Lu Yin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Constructing Concurrent Data Structures on FPGA with Channels.