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Disambiguation of "Xue, Chun Jason"

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Analysis and approximation for bank selection instruction minimization on partitioned memory architecture.

, , , and . LCTES, page 1-8. ACM, (2010)

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Xue Xue Zhang

Ian Jason

Cheng Xue

Jia Xue

Min Xue

 

Other publications of authors with the same name

Balanced loop retiming to effectively architect STT-RAM-based hybrid cache for VLIW processors., , , , , , and . SAC, page 1710-1716. ACM, (2016)Introduction to the Special Issue on NVM and Storage., and . ACM Trans. Storage, 14 (1): 2:1-2:2 (2018)I/O scheduling with mapping cache awareness for flash based storage systems., , , , and . EMSOFT, page 21:1-21:10. ACM, (2016)Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism., , , , , and . IEEE Trans. Parallel Distributed Syst., 31 (9): 2185-2200 (2020)Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding., , , and . ACM Trans. Embed. Comput. Syst., 9 (3): 22:1-22:26 (2010)Power-Aware Variable Partitioning for DSPs With Hybrid PRAM and DRAM Main Memory., , , and . IEEE Trans. Signal Process., 61 (14): 3509-3520 (2013)Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints., , , and . DATE, page 1202-1207. ACM, (2008)Maximizing Forward Progress with Cache-aware Backup for Self-powered Non-volatile Processors., , , , and . DAC, page 2:1-2:6. ACM, (2017)Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory., , , and . DAC, page 405-410. ACM, (2011)Performance-aware task scheduling for energy harvesting nonvolatile processors considering power switching overhead., , , , , , , , , and . DAC, page 156:1-156:6. ACM, (2016)