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Differential Testing of x86 Instruction Decoders with Instruction Operand Inferring Algorithm.

, , , , and . ICCD, page 196-203. IEEE, (2021)

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A 100 GOPS ASP based baseband processor for wireless communication., , , , , and . DATE, page 121-124. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Polar Codes with Local-Global Decoding., , and . CoRR, (2023)Security-first architecture: deploying physically isolated active security processors for safeguarding the future of computing., , , , , , , and . Cybersecur., 1 (1): 2 (2018)Search Robust and Adaptable Architecture., , , and . ICASSP, page 5155-5159. IEEE, (2024)SoK: Can We Really Detect Cache Side-Channel Attacks by Monitoring Performance Counters?, , , , and . AsiaCCS, ACM, (2024)A Formal Verification Methodology for Cache Architectures Based on Noninterference Hyperproperties., , , , , and . CSCWD, page 772-777. IEEE, (2024)System-level design methodology enabling fast development of baseband MP-SoC for 4G small cell base station., , and . DATE, page 1-6. European Design and Automation Association, (2014)An accurate ACOSSO metamodeling technique for processor architecture design space exploration., , , and . ASP-DAC, page 689-694. IEEE, (2015)Elastic Resource Allocation Based on Dynamic Perception of Operator Influence Domain in Distributed Stream Processing., , , , , , and . ICCS (1), volume 13350 of Lecture Notes in Computer Science, page 734-748. Springer, (2022)Analysis of DRAM Vulnerability Using Computation Tree Logic., , , , , and . ICC, page 986-991. IEEE, (2022)