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PinComm: Characterizing Intra-application Communication for the Many-Core Era.

, , , , and . ICPADS, page 500-507. IEEE Computer Society, (2010)

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Many-core graph workload analysis., , , , and . SC, page 22:1-22:11. IEEE / ACM, (2018)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation., , , and . ISPASS, page 124-133. IEEE, (2023)Fairness-aware scheduling on single-ISA heterogeneous multi-cores., , , , and . PACT, page 177-187. IEEE Computer Society, (2013)Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects., , , , , and . Hot Interconnects, page 163-169. IEEE Computer Society, (2009)Strategies for dynamic memory allocation in hybrid architectures., , and . Conf. Computing Frontiers, page 217-220. ACM, (2009)Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy., , , and . Euro-Par Workshops (2), volume 7156 of Lecture Notes in Computer Science, page 272-281. Springer, (2011)Enabling Branch-Mispredict Level Parallelism by Selectively Flushing Instructions., , , and . MICRO, page 767-778. ACM, (2021)Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior., , , , , , and . ISPA Workshops, volume 4331 of Lecture Notes in Computer Science, page 311-321. Springer, (2006)Traffic Temporal Analysis for Reconfigurable Interconnects in Shared-Memory Systems., , , , and . IPDPS, IEEE Computer Society, (2005)