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Disambiguation of "Xydis, Sotirios"

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High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures.

, , , and . ISVLSI, page 486-487. IEEE Computer Society, (2010)

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Sotirios Siampos

Sotirios Chalkas

Sotirios Giorginis

Sotirios Wlachos

Sotirios Nedios

 

Other publications of authors with the same name

Voltage island management in near threshold manycore architectures to mitigate dark silicon., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Rusty: Runtime System Predictability Leveraging LSTM Neural Networks., , and . IEEE Comput. Archit. Lett., 18 (2): 103-106 (2019)Dataflow Acceleration of Smith-Waterman with Traceback for High Throughput Next Generation Sequencing., , , , , and . FPL, page 74-80. IEEE, (2019)Multi-Level Approximate Accelerator Synthesis Under Voltage Island Constraints., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (4): 607-611 (2019)Beyond RSS: Towards Intelligent Dynamic Memory Management (Work in Progress)., , , , , and . MPLR, page 158-164. ACM, (2023)Variability-Aware Voltage Island Management for Near-Threshold Computing with Performance Guarantees., , , and . Near Threshold Computing, Springer, (2016)Adrias: Interference-Aware Memory Orchestration for Disaggregated Cloud Infrastructures., , , , and . HPCA, page 855-869. IEEE, (2023)OpenCL-based Virtual Prototyping and Simulation of Many-Accelerator Architectures., , , , , and . ACM Trans. Embed. Comput. Syst., 17 (5): 86:1-86:27 (2018)VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing Circuits., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (6): 1204-1208 (2018)Reconfigurable Computing for Analytics Acceleration of Big Bio-Data: The AEGLE Approach., , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 531-541. Springer, (2015)