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Understanding the memory window in 1T-FeFET memories: a depolarization field perspective., , , , , , , и . IMW, стр. 1-4. IEEE, (2021)Optimization of Retention in Ferroelectricity Boosted Gate Stacks for 3D NAND., , , , , , , и . IMW, стр. 1-4. IEEE, (2023)Enabling 3D NAND Trench Cells for Scaled Flash Memories., , , , , , , , и . IMW, стр. 1-4. IEEE, (2023)High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction., , , , , , , , и . IMW, стр. 1-4. IEEE, (2022)Gate Side Injection Operating Mode for 3D NAND Flash Memories., , , , , , , , и . IMW, стр. 1-4. IEEE, (2024)Optimization of inter-gate-dielectrics in hybrid float gate devices to reduce window instability during memory operations., , , , , , , , и . Microelectron. Reliab., 54 (9-10): 2258-2261 (2014)Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance., , , , , , , , , и . IRPS, стр. 1-6. IEEE, (2024)First demonstration of ferroelectric Si: HfO2 based 3D FE-FET with trench architecture for dense nonvolatile memory application., , , , , , , , и . IMW, стр. 1-4. IEEE, (2021)