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Disambiguation of "van Ierssel, Marcus"

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A Field Programmable Accelerator for Compiled-Code Applications.

, , and . ICCD, page 491-496. IEEE Computer Society, (1993)

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Huynh Van Van

Staffan Lars Mikael Vandersee

Stefanie Vanis

Christoph Vannahme

Jolanda Van der Noll

 

Other publications of authors with the same name

The Transmogrifier-2: a 1 million gate rapid-prototyping system., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (2): 188-198 (1998)A 5Gb/s Transmitter with Reflection Cancellation for Backplane Transceivers., , , , and . CICC, page 413-416. IEEE, (2006)An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signaling., , and . SoCC, page 297-300. IEEE, (2004)10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 56 (1): 30-42 (2021)Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISI., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (5): 1306-1315 (2008)A 3.2Gb/s Semi-Blind-Oversampling CDR., , , and . ISSCC, page 1304-1313. IEEE, (2006)The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System., , , , and . FPGA, page 53-61. ACM, (1997)A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support., , , , , , , , , and 1 other author(s). ISSCC, page 106-108. IEEE, (2018)11.2 A 26.5625-to-106.25Gb/s XSR SerDes with 1.55pJ/b Efficiency in 7nm CMOS., , , , , , , , , and 7 other author(s). ISSCC, page 181-183. IEEE, (2021)A Field Programmable Accelerator for Compiled-Code Applications., , and . ICCD, page 491-496. IEEE Computer Society, (1993)