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A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.

J. Yang, Z. Zhang, N. Qi, L. Liu, J. Liu, and N. Wu. Sci. China Inf. Sci., 62 (6): 62405:1-62405:16 (2019)

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Jinglan Wu

Recovery of citric acid from fermentation broth using simulated moving bed technology: = Reinigung von Zitronensäure aus Fermentationslösung durch kontinuierliche ChromatographieJ. Wu. Uni Erlangen-Nürnberg, (2009)

Dagang Wu

Zongmin Wu

Weijia Wu

Hongzhong Wu

Other publications of authors with the same name

High-Speed Target Tracking System Based on a Hierarchical Parallel Vision Processor and Gray-Level LBP Algorithm.Y. Yang, J. Yang, L. Liu, and N. Wu. IEEE Trans. Syst. Man Cybern. Syst., 47 (6): 950-964 (2017)Terahertz detector for imaging in 180-nm standard CMOS process.Z. yang Liu, L. Liu, Z. Zhang, J. Liu, and N. Wu. Sci. China Inf. Sci., 60 (8): 82401 (2017)A LO-leakage auto-calibrated CMOS IEEE802.11b/g WLAN transceiver.H. Wang, G. Shou, and N. Wu. ISCAS, page 3912-3915. IEEE, (2007)DeepTempo: A Hardware-Friendly Direct Feedback Alignment Multi-Layer Tempotron Learning Rule for Deep Spiking Neural Networks.C. Shi, T. Wang, J. He, J. Zhang, L. Liu, and N. Wu. IEEE Trans. Circuits Syst. II Express Briefs, 68 (5): 1581-1585 (2021)An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips.L. Chen, C. Shi, J. He, J. Yu, H. Wang, J. Lu, L. Liu, N. Wu, and M. Tian. IEEE Trans. Circuits Syst. I Regul. Pap., 70 (11): 4249-4259 (November 2023)A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS.J. He, Y. Zhang, H. Liu, Q. Liao, Z. Zhang, M. Li, F. Jiang, J. Shi, J. Liu, N. Wu and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 69 (3): 1159-1170 (2022)Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects.J. He, D. Lu, H. Xue, S. Chen, H. Liu, L. Li, G. Li, Z. Zhang, J. Liu, L. Liu and 6 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 69 (11): 4345-4357 (2022)A 2.4-3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique.Z. Zhang, L. Liu, P. Feng, and N. Wu. IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 929-941 (2017)A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices.S. Wang, M. Zhao, R. Dou, S. Yu, L. Liu, and N. Wu. Sensors, 21 (9): 3265 (2021)A 0.0035-mm2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE.Z. Zhang, Z. Zhang, Y. Chen, G. Wang, X. Shen, N. Qi, G. Li, S. Yu, J. Liu, N. Wu and 1 other author(s). ESSCIRC, page 177-180. IEEE, (2023)

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Disambiguation of "Wu, Nanjian"

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A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.

Please choose a person to relate this publication to

Jinglan Wu

Dagang Wu

Zongmin Wu

Weijia Wu

Hongzhong Wu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wu, Nanjian"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.

Please choose a person to relate this publication to

Jinglan Wu

Dagang Wu

Zongmin Wu

Weijia Wu

Hongzhong Wu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.