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Rebooting Computers to Avoid Meltdown and Spectre., , , и . Computer, 51 (4): 74-77 (2018)System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design., , , и . IEEE Trans. Very Large Scale Integr. Syst., 8 (2): 129-137 (2000)Compilers for Instruction-Level Parallelism., , , , , и . Computer, 30 (12): 63-69 (1997)Using branch handling hardware to support profile-driven optimization., , и . MICRO, стр. 12-21. ACM / IEEE Computer Society, (1994)Experimental Insights from the Rogues Gallery., , , , , и . ICRC, стр. 80-87. IEEE, (2019)Systematic Computer Architecture Prototyping. University of Illinois Urbana-Champaign, USA, (1992)Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors., и . MICRO, стр. 82-92. ACM/IEEE Computer Society, (1999)Adaptive Mode Control: A Static-Power-Efficient Cache Design., , , и . IEEE PACT, стр. 61-70. IEEE Computer Society, (2001)A Fast Interrupt Handling Scheme for VLIW Processors., , , , , и . IEEE PACT, стр. 136-141. IEEE Computer Society, (1998)A Power Model for Register-Sharing Structures., и . DIPES, том 271 из IFIP, стр. 131-142. Springer, (2008)