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High-efficient architecture of Godson-T many-core processor., , , , , , and . Hot Chips Symposium, page 1-31. IEEE, (2011)A Routing-Aware Mapping Method for Dataflow Architectures., , , , , and . NPC, volume 13615 of Lecture Notes in Computer Science, page 3-16. Springer, (2022)Triangle Counting by Adaptively Resampling over Evolving Graph Streams., , , , , and . SEKE, page 387-392. KSI Research Inc., (2021)Alleviating Transfer Latency in DataFlow Accelerator for DSP Applications., , , , , , , , , and 1 other author(s). ICCD, page 440-443. IEEE, (2023)A High-accurate Multi-objective Ensemble Exploration Framework for Design Space of CPU Microarchitecture., , , , , and . ACM Great Lakes Symposium on VLSI, page 379-383. ACM, (2023)JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits., , , , , , , and . ACM Great Lakes Symposium on VLSI, page 515-520. ACM, (2023)LRP: Predictive output activation based on SVD approach for CNN s acceleration., , , , , and . DATE, page 831-836. IEEE, (2022)A Fast Linear-Space Sequence Alignment Algorithm with Dynamic Parallelization Framework., , and . CIT (1), page 274-279. IEEE Computer Society, (2009)HetGraph: A High Performance CPU-CGRA Architecture for Matrix-based Graph Analytics., , , and . ACM Great Lakes Symposium on VLSI, page 387-391. ACM, (2022)Survey on Graph Neural Network Acceleration: An Algorithmic Perspective., , , , , , , and . IJCAI, page 5521-5529. ijcai.org, (2022)