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On the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs.

L. Zordan, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, и N. Badereddine. ITC, стр. 1-10. IEEE Computer Society, (2013)

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Benoît Girard

Adrien Girard

Jules Girard

Pierre Girard

Yann Girard

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Logical dynamics of belief change in the community.F. Liu, J. Seligman, и P. Girard. Synthese, 191 (11): 2403-2431 (2014)Effect-cause intra-cell diagnosis at transistor level.Z. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, и E. Auvray. ISQED, стр. 460-467. IEEE, (2013)Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing.N. Badereddine, P. Girard, S. Pravossoudovitch, C. Landrault, A. Virazel, и H. Wunderlich. VLSI-SoC, стр. 403-408. IEEE, (2006)Energy Model based Control for Forming Processes.P. Girard, и V. Thomson. ICINCO-ICSO, стр. 51-59. INSTICC Press, (2008)DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown Effect.J. Chen, C. Lu, J. Ni, X. Guo, P. Girard, и Y. Cheng. IEEE Trans. Very Large Scale Integr. Syst., 29 (7): 1325-1334 (2021)Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS.A. Yan, L. Wang, J. Cui, Z. Huang, T. Ni, P. Girard, и X. Wen. IEEE Trans. Very Large Scale Integr. Syst., 32 (1): 116-127 (января 2024)Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments.A. Yan, Z. Li, J. Cui, Z. Huang, T. Ni, P. Girard, и X. Wen. IEEE Trans. Aerosp. Electron. Syst., 59 (3): 2885-2897 (июня 2023)Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata.A. Yan, R. Liu, J. Cui, T. Ni, P. Girard, X. Wen, и J. Zhang. IEEE Trans. Circuits Syst. II Express Briefs, 70 (6): 2256-2260 (июня 2023)On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits.B. Deveautour, A. Virazel, P. Girard, и V. Gherman. J. Electron. Test., 36 (1): 33-46 (2020)A Ring Architecture Strategy for BIST Test Pattern Generation.C. Fagot, O. Gascuel, P. Girard, и C. Landrault. J. Electron. Test., 19 (3): 223-231 (2003)

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