Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.

L. Liu, Y. Ren, C. Deng, S. Yin, S. Wei, and J. Han. ASP-DAC, page 48-53. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Liu Liu

Thomas Leibohm

Yeshayahu Leibowitz

Other publications of authors with the same name

Battery aware tasks allocating algorithm for multi-battery operated system.P. Ouyang, S. Yin, L. Liu, and S. Wei. APCCAS, page 875-878. IEEE, (2010)A Fast-locking and Wide-range Reversible SAR DLL.L. Wang, L. Liu, and H. Chen. ISCAS, page 992-995. IEEE, (2009)Extending lifetime of battery-powered coarse-grained reconfigurable computing platforms.S. Yin, P. Ouyang, L. Liu, and S. Wei. DATE, page 1-6. European Design and Automation Association, (2014)A reconfigurable multi-processor SoC for media applications.M. Zhu, L. Liu, S. Yin, Y. Wang, W. Wang, and S. Wei. ISCAS, page 2011-2014. IEEE, (2010)A high efficient baseband transceiver for IEEE 802.15.4 LR-WPAN systems.S. Yin, J. Cui, A. Luo, L. Liu, and S. Wei. ASICON, page 224-227. IEEE, (2011)Efficient memory partitioning for parallel data access in multidimensional arrays.C. Meng, S. Yin, P. Ouyang, L. Liu, and S. Wei. DAC, page 160:1-160:6. ACM, (2015)MapReduce inspired loop mapping for coarse-grained reconfigurable architecture.S. Yin, S. Shao, L. Liu, and S. Wei. Sci. China Inf. Sci., 57 (12): 1-14 (2014)A Novel Composite Method to Accelerate Control Flow on Reconfigurable Architecture (Abstract Only).J. Wang, L. Liu, J. Zhu, S. Yin, and S. Wei. FPGA, page 270. ACM, (2015)An Ultra-High Energy-Efficient Reconfigurable Processor for Deep Neural Networks with Binary/Ternary Weights in 28NM CMOS.S. Yin, P. Ouyang, J. Yang, T. Lu, X. Li, L. Liu, and S. Wei. VLSI Circuits, page 37-38. IEEE, (2018)Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms.L. Liu, B. Wang, C. Deng, M. Zhu, S. Yin, and S. Wei. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3081-3094 (2018)

BibSonomy

Disambiguation of "Liu, Leibo"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Thomas Leibohm

Yeshayahu Leibowitz

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liu, Leibo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Thomas Leibohm

Yeshayahu Leibowitz

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures.