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Disambiguation of "Chen, Lien-Fei"

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Memory analysis and throughput enhancement for cost effective bit-plane coder in JPEG2000 applications.

, , and . ICASSP (5), page 17-20. IEEE, (2005)

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Fei Chen

Fei Chen

Fei Chen

Fei Chen

Fei Chen

 

Other publications of authors with the same name

Analysis and Architecture Design for Memory Efficient Parallel Embedded Block Coding Architecture in JPEG 2000., , , and . ICASSP (3), page 964-967. IEEE, (2006)A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications., , , , , , , , , and 17 other author(s). IEEE J. Solid State Circuits, 51 (1): 56-67 (2016)Analysis and architecture design of multi-transform architecture for H.264/AVC intra frame coder., , , and . ICME, page 145-148. IEEE Computer Society, (2008)A memory interleaving and interlacing architecture for deblocking filter in H.264/AVC., , and . IEEE Trans. Consumer Electronics, 56 (4): 2812-2818 (2010)A performance-driven configurable motion estimator for full-search block-matching algorithm., and . ISCAS (2), page 233-236. IEEE, (2004)A novel memoryless AES cipher architecture for networking applications., , , , and . ISCAS (4), page 333-336. IEEE, (2004)Hybrid parallel motion estimation architecture based on fast top-winners search algorithm., , and . IEEE Trans. Consumer Electronics, 56 (3): 1837-1842 (2010)A high-speed 2-D transform architecture with unique kernel for multi-standard video applications., , and . ISCAS, page 21-24. IEEE, (2008)A high data-reuse architecture with double-slice processing for full-search block-matching algorithm., and . ISCAS (2), page 716-719. IEEE, (2003)A high-performance and memory-efficient VLSI architecture with parallel scanning method for 2-D lifting-based discrete wavelet transform., , and . IEEE Trans. Consumer Electronics, 55 (2): 400-407 (2009)