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A logic-compatible embedded flash memory featuring a multi-story high voltage switch and a selective refresh scheme., , and . VLSIC, page 130-131. IEEE, (2012)Fault-tolerant ripple-carry binary adder using partial triple modular redundancy (PTMR)., , and . ISCAS, page 41-44. IEEE, (2015)A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function., , , , and . ISLPED, page 1-6. IEEE, (2017)Predicting Soft-Response of MUX PUFs via Logistic Regression of Total Delay Difference., , , and . ISCAS, page 1-5. IEEE, (2018)A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer., , , and . A-SSCC, page 187-190. IEEE, (2018)A multi-story power delivery technique for 3D integrated circuits., , , and . ISLPED, page 57-62. ACM, (2008)Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs., , , , and . ISLPED, page 124-129. ACM, (2016)Leakage Power Analysis and Reduction for Nanoscale Circuits., , , , and . IEEE Micro, 26 (2): 68-80 (2006)A Voltage Scalable 0.26 V, 64 kb 8T SRAM With Vmin Lowering Techniques and Deep Sleep Mode., , and . IEEE J. Solid State Circuits, 44 (6): 1785-1795 (2009)Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits., , and . IEEE J. Solid State Circuits, 43 (4): 874-880 (2008)