From post

ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation.

, , , , , , , и . Int. J. Parallel Program., 52 (1-2): 93-123 (апреля 2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN Acceleration, , , и . (2016)cite arxiv:1606.05487.μDMA: An autonomous I/O subsystem for IoT end-nodes., , , и . PATMOS, стр. 1-8. IEEE, (2017)Scalable EEG seizure detection on an ultra low power multi-core architecture., , , и . BioCAS, стр. 86-89. IEEE, (2016)Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters., , , , , и . CoRR, (2020)DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs., , , , , и . IEEE Trans. Computers, 70 (8): 1253-1268 (2021)Modular Design and Optimization of Biomedical Applications for Ultralow Power Heterogeneous Platforms., , , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (11): 3821-3832 (2020)CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration., , , , , и . CoRR, (2023)A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 68 (1): 156-160 (2021)RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration., , , , и . CoRR, (2023)RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs., , , , и . DATE, стр. 1099-1102. IEEE, (2022)