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Guest Editorial 2021 Custom Integrated Circuits Conference., and . IEEE J. Solid State Circuits, 57 (3): 675-676 (2022)Phase Noise Compensation for OFDM Systems Exploiting Coherence Bandwidth., , , and . SPAWC, page 1-5. IEEE, (2019)A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET., , , , , , , , , and 9 other author(s). ESSCIRC, page 259-262. IEEE, (2021)53 Gbps Native GF(2 4) 2 Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors., , , , , , , , and . IEEE J. Solid State Circuits, 46 (4): 767-776 (2011)2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors., , , , , , , , and . IEEE J. Solid State Circuits, 47 (11): 2807-2821 (2012)A 2.05 GVertices/s 151 mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32 nm CMOS., , , , , , , and . IEEE J. Solid State Circuits, 48 (1): 128-139 (2013)18Gbps, 50mW reconfigurable multi-mode SHA Hashing accelerator in 45nm CMOS., , , , , , , , , and . ESSCIRC, page 210-213. IEEE, (2010)A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI., , , and . VLSI Circuits, page 1-2. IEEE, (2021)A 260mV 468GOPS/W 256b 4-way to 32-way vector shifter with permute-assisted skip in 22nm tri-gate CMOS., , , , , , and . ESSCIRC, page 177-180. IEEE, (2012)A 2.8GHz 128-entry × 152b 3-read/2-write multi-precision floating-point register file and shuffler in 32nm CMOS., , , , , , , and . VLSIC, page 118-119. IEEE, (2012)