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Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications.

, , , , , , and . J. Signal Process. Syst., 53 (3): 301-321 (2008)

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Design automation in norway., and . DAC, page 251-256. ACM, (1975)An integrated system for interactive editing of schematics, logic simulation and PCB layout design., and . DAC, page 1-8. ACM, (1978)Experiments with autonomous test of PLAs., and . EURO-DAC, page 503-509. EEE Computer Society, (1991)Detection of Partially Simultaneously Alive Signals in Storage Requirement Estimation for Data Intensive Applications., , and . DAC, page 365-370. ACM, (2001)Storage requirement estimation for data intensive applications with partially fixed execution ordering., , and . CODES, page 56-60. ACM, (2000)4300 Megasamples/s Wave Digital Filter Implementation In Bit-parallel Tspc Circuit Technique., and . ISSPA, page 668-671. IEEE, (1996)Comparison of two architectures for implementation of the discrete cosine transform., , and . ICASSP, page 3272-3275. IEEE Computer Society, (1996)Reducing ATE Bandwidth and memory requirements: A diagnosis friendly scan test response compactor., , and . DFT, page 119-127. IEEE Computer Society, (2006)An Implementation of an Embedded Microprocessor Core with Support for Executing Byte Compiled Java Code., and . DSD, page 396-399. IEEE Computer Society, (2001)Design Quality and Design Efficiency; Definitions, Metrics and Relevant Design Experiences.. ISQED, page 389-394. IEEE Computer Society, (2000)