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LeFlow: Automatic Compilation of TensorFlow Machine Learning Applications to FPGAs., , , and . FPT, page 393-396. IEEE, (2018)Syncopation: Adaptive Clock Management for High-Level Synthesis Generated Circuits on FPGAs., , , and . FPL, page 225-230. IEEE, (2020)In-circuit tuning of deep learning designs., , , , , and . J. Syst. Archit., (2021)Towards In-Circuit Tuning of Deep Learning Designs., , , , and . ICCAD, page 1-6. ACM, (2019)Flexible Instrumentation for Live On-Chip Debug of Machine Learning Training on FPGAs., , , and . FCCM, page 20-28. IEEE, (2021)Kibo: An Open-Source Fixed-Point Tool-kit for Training and Inference in FPGA-Based Deep Learning Networks., , and . IPDPS Workshops, page 178-185. IEEE Computer Society, (2018)On-chip FPGA Debug Instrumentation for Machine Learning Applications., , , , and . FPGA, page 110-115. ACM, (2019)An Overlay for Rapid FPGA Debug of Machine Learning Applications., , , , , and . FPT, page 135-143. IEEE, (2019)Boosting Domain-Specific Debug Through Inter-frame Compression., , , and . FPT, page 1-10. IEEE, (2022)Towards Overlay-based Rapid In-Circuit Tuning of Deep Learning Designs., , , , , and . FPT, page 301. IEEE, (2020)