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Comparing vertical and horizontal SIMD vector processor architectures for accelerated image feature extraction.

, , and . J. Syst. Archit., (2019)

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Design of an efficient OFDM burst synchronization scheme., , and . ISCAS (3), page 449-452. IEEE, (2002)Moment-Based Estimation of Switching Activity for Correlated Distributions., , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 859-868. Springer, (2004)On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 819-828. Springer, (2004)Automated Toolchain for Enhanced Productivity in Reconfigurable Multi-accelerator Systems., , , , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 45-60. Springer, (2020)Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems., , , and . Des. Autom. Embed. Syst., 8 (4): 297-308 (2003)Accelerator Framework of Spike-By-Spike Neural Networks for Inference and Incremental Learning in Embedded Systems., , , and . MOCAST, page 1-5. IEEE, (2020)Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment., , , and . Integr., (2019)An FPGA-based thermal emulation framework for multicore systems., and . PATMOS, page 1-6. IEEE, (2017)Run-time schedulability check of real-time tasks for energy efficiency., and . PATMOS, page 114-119. IEEE, (2016)Symbolic Circuit Analysis under an Arc Based Timing Model., and . ETS, page 1-2. IEEE, (2019)