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Disambiguation of "Suzuki, Junnosuke"

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Pianissimo: A Sub-mW Class DNN Accelerator With Progressively Adjustable Bit-Precision.

, , , , , , , , , and . IEEE Access, (2024)

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Yoko Suzuki

Shigenobu Suzuki

Seiichi Suzuki

Kazuyo Suzuki

Keiko Suzuki

 

Other publications of authors with the same name

A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations., , , , , , and . MCSoC, page 478-485. IEEE, (2023)Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet., , , , , , , , and . ISSCC, page 1-3. IEEE, (2022)High Throughput Datapath Design for Vision Permutator FPGA Accelerator., , , , , and . ICCE, page 1-2. IEEE, (2024)ProgressiveNN: Achieving Computational Scalability with Dynamic Bit-Precision Adjustment by MSB-first Accumulative Computation., , , , , , , and . Int. J. Netw. Comput., 11 (2): 338-353 (2021)Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge., , , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)Pianissimo: A Sub-mW Class DNN Accelerator With Progressively Adjustable Bit-Precision., , , , , , , , , and . IEEE Access, (2024)ProgressiveNN: Achieving Computational Scalability without Network Alteration by MSB-first Accumulative Computation., , , , , , and . CANDAR, page 215-220. IEEE, (2020)