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A Calculus for Protocol Specification and Validation.

, , and . Protocol Specification, Testing, and Verification, page 19-34. North-Holland, (1983)

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Analysis of digital circuits through symbolic reduction., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (11): 1356-1371 (1991)A Unified Approach For Showing Language Containment And Equivalence Between Various Types Of Omega-Automata., , and . CAAP, volume 431 of Lecture Notes in Computer Science, page 103-116. Springer, (1990)Model Checking Synchronous Timing Diagrams., , , and . FMCAD, volume 1954 of Lecture Notes in Computer Science, page 283-298. Springer, (2000)Rtdt: A Front-End for Efficient Model Checking of Synchronous Timing Diagrams., , , and . CAV, volume 2102 of Lecture Notes in Computer Science, page 387-390. Springer, (2001)Model Checking and Abstraction.. SARA, volume 2371 of Lecture Notes in Computer Science, page 1-17. Springer, (2002)An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment., , , , and . CHARME, volume 3725 of Lecture Notes in Computer Science, page 254-268. Springer, (2005)Complementing Deterministic Büchi Automata in Polynomial Time.. J. Comput. Syst. Sci., 35 (1): 59-71 (1987)A Structural Linearization Principle for Processes., , , and . Formal Methods Syst. Des., 5 (3): 227-244 (1994)A Structural Induction Theorem for Processes, and . Inf. Comput., 117 (1): 1-11 (February 1995)Extensions of Temporal Logic for Counting with Applications to Model Verification., , and . PSTV, page 373-386. North-Holland, (1989)