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Challenges in the design of high-speed clock and data recovery circuits.. IEEE Commun. Mag., 40 (8): 94-101 (2002)Jitter-Power Trade-Offs in PLLs.. IEEE Trans. Circuits Syst. I Regul. Pap., 68 (4): 1381-1387 (2021)The future of radios.. ISCAS, page 1-8. IEEE, (2015)A receiver architecture for intra-band carrier aggregation., and . VLSIC, page 1-2. IEEE, (2014)RF CMOS transceivers for cellular telephony.. IEEE Communications Magazine, 41 (8): 144-149 (2003)The Role of PLLs in Future Wireline Transmitters.. IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (8): 1786-1793 (2009)Channel Selection at RF Using Miller Bandpass Filters., and . IEEE J. Solid State Circuits, 49 (12): 3063-3078 (2014)A Low-Power CMOS Receiver for 5 GHz WLAN., and . IEEE J. Solid State Circuits, 50 (3): 630-643 (2015)A 2.4-GHz RF Fractional-N Synthesizer With BW = 0.25fREF., and . IEEE J. Solid State Circuits, 53 (6): 1707-1718 (2018)A New Transceiver Architecture for the 60-GHz Band., and . IEEE J. Solid State Circuits, 44 (3): 751-762 (2009)