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Disambiguation of "Zheng, Xuqiang"

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Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators.

, , , , , , , and . IEEE J. Solid State Circuits, 55 (6): 1651-1664 (2020)

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Zheng-Zheng Kuang

Xing Zheng

Jiarong Zheng

Xu Zheng

Nanxi Zheng

 

Other publications of authors with the same name

A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS., , , , , , , and . Microelectron. J., (2022)A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology., , , , , and . ASICON, page 1-4. IEEE, (2013)A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS., , , , , , , , , and . IEICE Electron. Express, 16 (3): 20181079 (2019)A 75mW 50Gbps SerDes transmitter with automatic serializing time window search in 65nm CMOS technology., , , , and . CICC, page 1-4. IEEE, (2014)A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS., , , , , , , and . ESSCIRC, page 527-530. IEEE, (2021)A high-output-swing 64-Gb/s PAM-4 transmitter with a 4-tap hybrid FFE in 28-nm CMOS., , , , , , , , and . IEICE Electron. Express, 21 (7): 20240104 (2024)A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS., , , , , , and . MWSCAS, page 932-935. IEEE, (2012)A 40-80 Gb/s PAM4 wireline transmitter in 65nm CMOS technology., , , , , , , and . MWSCAS, page 539-542. IEEE, (2017)A Robust Visual System for Small Target Motion Detection Against Cluttered Moving Backgrounds., , , and . IEEE Trans. Neural Networks Learn. Syst., 31 (3): 839-853 (2020)A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS., , , , , and . ISCAS, page 309-312. IEEE, (2012)