Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.

B. Adhi, C. Cortes, Y. Tan, T. Kojima, A. Podobas, and K. Sano. IPDPS Workshops, page 639-646. IEEE, (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Artur Podobas

Artur Teuscher

Artur Budnowski

Artur Sielmann

Artur Spanier

Other publications of authors with the same name

Double-Precision FPUs in High-Performance Computing: An Embarrassment of Riches?J. Domke, K. Matsumura, M. Wahib, H. Zhang, K. Yashima, T. Tsuchikawa, Y. Tsuji, A. Podobas, and S. Matsuoka. IPDPS, page 78-88. IEEE, (2019)High-Performance High-Order Stencil Computation on FPGAs Using OpenCL.H. Zohouri, A. Podobas, and S. Matsuoka. CoRR, (2020)White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing.R. Iakymchuk, D. Mukunoki, A. Podobas, F. Jézéquel, T. Imamura, N. Fujita, J. Huthmann, S. Kudo, Y. Tan, J. Domke and 8 other author(s). CoRR, (2020)A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays.M. Karp, A. Podobas, T. Kenter, N. Jansson, C. Plessl, P. Schlatter, and S. Markidis. CoRR, (2021)The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC).A. Podobas, K. Sano, and J. Anderson. IPDPS Workshops, page 625-626. IEEE, (2022)Accelerating Radiation Therapy Dose Calculation with Nvidia GPUs.F. Liu, N. Jansson, A. Podobas, A. Fredriksson, and S. Markidis. IPDPS Workshops, page 449-458. IEEE, (2021)NoaSci: A Numerical Object Array Library for I/O of Scientific Applications on Object Storage.S. Chien, A. Podobas, M. Svedin, A. Tkachuk, S. Sayed, P. Herman, G. Umanesan, S. Narasimhamurthy, and S. Markidis. PDP, page 172-176. IEEE, (2022)VESTEC: Visual Exploration and Sampling Toolkit for Extreme Computing.M. Flatken, A. Podobas, R. Fellegara, A. Basermann, J. Holke, D. Knapp, M. Kontak, C. Krullikowski, M. Nolde, N. Brown and 21 other author(s). IEEE Access, (2023)A Survey on Coarse-Grained Reconfigurable Architectures From a Performance Perspective.A. Podobas, K. Sano, and S. Matsuoka. IEEE Access, (2020)Q2Logic: An Coarse-Grained Architecture targeting Schrödinger Quantum Circuit Simulations.A. Podobas. CoRR, (2023)

BibSonomy

Disambiguation of "Podobas, Artur"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.

Please choose a person to relate this publication to

Artur Podobas

Artur Teuscher

Artur Budnowski

Artur Sielmann

Artur Spanier

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Podobas, Artur"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.

Please choose a person to relate this publication to

Artur Podobas

Artur Teuscher

Artur Budnowski

Artur Sielmann

Artur Spanier

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation.